- Admitted
- Ohio, 2011
- USPTO
- Reg. No. 72,052 (Attorney), registered 2013
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James R. Potashnik
Patent Attorney, Member
- Education
- J.D., cum laude, University of Akron School of Law, 2011
- M.S., Physics, The Ohio State University, 2005
- M.Eng., Electrical Engineering, University of Notre Dame, 2003
- B.S., Physics, cum laude, John Carroll University, 2001
- Technical focus
- Physics and electrical engineering; semiconductor fabrication and communication systems
James R. Potashnik is a patent attorney. He earned his Juris Doctor, cum laude, from the University of Akron School of Law in 2011 and was admitted to practice in Ohio the same year. His technical background is in physics and electrical engineering. He received a Bachelor of Science in Physics, cum laude, from John Carroll University in 2001; a Master of Engineering in Electrical Engineering from the University of Notre Dame in 2003, where he was a research fellow; and a Master of Science in Physics from The Ohio State University in 2005, where he was also a research fellow.
While in law school, James worked full time as a patent engineer and prepared and prosecuted more than 200 patent applications in a variety of technologies, including semiconductor fabrication and communication systems. He was an assistant editor of the Law Review, and his article on the international infringement of patents was selected for publication in the University of Akron Intellectual Property Law Journal. He was also recognized for outstanding achievement in international law and intellectual property taxation.
Before joining the firm, James was a development engineer with IBM in East Fishkill, New York, where he worked on ground-rule development for the 45 nm and 32 nm technology nodes, focusing on back-end metallization and passive devices. He has also worked in high-energy physics (making fiber-optic waveguides for Fermilab’s CDF particle detector, performing Monte Carlo simulations of B physics, and performing generator-level simulations of Higgs processes and backgrounds for Fermilab’s D0 particle detector) and in polymer electronics (studying the operation and fabrication of organic semiconductors). He has extensive coursework in electromagnetics, quantum mechanics, and thermodynamics.
Selected Publications
- J. Potashnik, A. Gabor, P. Selvam, “Design Polishing,” Presented at Litho Symposium 2006, hosted by IBM, Yorktown Heights, New York (2006).
- R.E. Belford, W. Zhao, J. Potashnik, Q. Liu, and A. Seabaugh, “Performance-augmented CMOS using back-end uniaxial strain”, 60th Device Research Conference Digest, IEEE catalog number 02TH8606, 41-42 (2002).